Regviz

NXP Semiconductors /MIMXRT1064 /IOMUXC_GPR /GPR34

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as GPR34

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/MIMXRT1064/IOMUXC_GPR/GPR34#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SIP_TEST_MUX_BOOT_PIN_SEL 0 (SIP_TEST_MUX_QSPI_SIP_EN_0)SIP_TEST_MUX_QSPI_SIP_EN

SIP_TEST_MUX_QSPI_SIP_EN=SIP_TEST_MUX_QSPI_SIP_EN_0

Description

GPR34 General Purpose Register

Fields

SIP_TEST_MUX_BOOT_PIN_SEL

Boot Pin select in SIP_TEST_MUX
SIP_TEST_MUX_QSPI_SIP_EN

Enable SIP_TEST_MUX

0 (SIP_TEST_MUX_QSPI_SIP_EN_0): SIP_TEST_MUX is disabled

1 (SIP_TEST_MUX_QSPI_SIP_EN_1): SIP_TEST_MUX is enabled

Links

()

Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data